A typical microprocessor used in modern computers may be capable of executing a few hundred different instructions having various operand sizes, possibly including 8-bit, 16-bit, 32-bit, 64-bit, 80-bit, or 128-bit operand sizes. These instructions may be decoded and translated into micro-operations for execution by the microprocessor. At any one time a modern microprocessor may store thousands of micro-operations for execution.
Instructions address operands in a number of ways. An operand may reside in a register or in memory or may be specified in the instruction itself as immediate data. Similarly the address of an operand in memory may reside in one or more registers or may be specified in the instruction itself as immediate data or specified by some combination of these alternatives. Instruction lengths may be fixed or variable, but storage allocated inside a microprocessor for storing micro-operations is typically of a fixed length. Micro-operation storage typically includes fields for specifying operand registers, portions of operand addresses and immediate operand data.
An instruction that includes a long immediate operand (64 or more bits of data for example) may require substantially more micro-operation storage than an instruction that has only register operands or includes only one or two bytes of immediate data. On the average, relatively few of the micro-operations stored by the microprocessor require a very large field for storing immediate operand data. If sufficient micro-operation storage is allocated to accommodate an instruction that includes a long immediate operand, then substantial storage space is potentially wasted, on average, for thousands of micro-operations stored by the microprocessor.
One technique for compressing immediate operand data is described in application Ser. No. 09/223,299, titled “System and Method for Storing Immediate Data,” filed Dec. 30, 1998, and assigned to Intel Corporation of Santa Clara, Calif.; now U.S. Pat. No. 6,338,132. The technique provides for control information that may be specified in a field of a current micro-operation to indicate that immediate data for the current micro-operation should be sign extended, or to indicate that a back scavenging technique is being used to store a portion of the immediate data for the current micro-operation with the previous micro-operation, or to indicate that a forward scavenging technique is being used to store a portion of the immediate data for the current micro-operation with the next micro-operation, or to indicate that the current micro-operation uses the same immediate data stored for the previous micro-operation.
While a majority of the microprocessors used in personal computers may be 32-bit processors, there are applications that may potentially benefit from larger operands and address larger amounts of addressable memory. Instructions used by such applications may use immediate data operands with more than 32-bits, in which case, scavenging storage from more than one adjacent micro-operation may be necessary. One disadvantage of such an extension to the prior scavenging techniques is added complexity of control circuitry. In addition, the probability of having one adjacent micro-operation from which to scavenge immediate data storage may be substantially greater than the probability of having an adjacent sequence of three or more micro-operations from which to scavenge immediate data storage.